The researchers of the largest semiconductor maker, Intel Corporation, have developed the world's first programmable processor that pledges to deliver supercomputer-like performance and consume less electricity.

"Our researchers have achieved a wonderful and key milestone in terms of being able to drive multi-core and parallel computing performance forward," said Justin Rattner, Intel Senior Fellow and chief technology officer. "It points the way to the near future when Teraflops-capable designs will be commonplace and reshape what we can all expect from our computers and the Internet at home and in the office."

The chip, dubbed "Tera Research Chip", is intended to exploit a generation of manufacturing technology that the company introduced last month. The basic design of transistors is altered in such a way that it would be able to continue to compress them, offering lower power and higher speeds, for at least another half decade or more, the chip company said.

This 80-core chip is the result of Intel's innovative "Tera-scale computing" research aimed at delivering Teraflops, or trillions of calculations per second, performance for future PCs and servers.

The chip consumes only 62 watts, which is less than what consumed by many single-core processors today. It provides distinctive insights into new silicon design methodologies, high-bandwidth interconnects, and energy management approaches.

The chip features an innovative tile design in which smaller cores are imitated as "tiles", making it easier to design a chip with many cores. Each tile includes a small core, or compute element, with a simple instruction set for processing floating-point data.

It also includes a mesh-like "network-on-chip" architecture that allows super-high bandwidth communications between the cores and is capable of moving Terabits of data per second inside the chip. This chip’s design consists of 80 tiles laid out in an 8x10 block array.

Intel, the world leader in silicon innovation, which unveiled more details of its tera-scale computing project on Sunday, will deliver a research paper on the project this week at the annual Integrated Solid State Circuits Conference (ISSCC) in San Francisco.

In a statement, Intel said that the Tera-scale performance, and the ability to move terabytes of data, will play a pivotal role in future computers with universal access to the Internet by powering new applications for education and collaboration, as well as enabling the rise of high-definition entertainment on PCs, servers and handheld devices.

Intelligent actions like instant video communications, artificial intelligence, photo-realistic games, multimedia data mining and real-time speech recognition, once considered as science fiction in "Star Trek" shows, could become everyday phenomena, the company added.

Although the chip is not compatible with Intel's current range of chips, but Intel said it had already started design work on a commercial version that would fundamentally have dozens or even hundreds of Intel-compatible microprocessors arranged in a tiled pattern on a single chip.

The company has no plans to bring this exact chip designed with floating point cores to market but it is using it to test new technologies such as high-bandwidth interconnects, energy management techniques, and a tile design method to build multicore chips, said Jerry Bautista, director of Intel's tera-scale research program.

The Tera-scale research is active in examining new innovations in processor or core functions, the types of chip-to-chip and chip-to-computer interconnects required to best move data.

The research firm is also active in finding, how software needs to be designed to best leverage multiple processor cores.